蘇慶龍 副教授

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1. Hsiu-Cheng Chang, Jia-Wei Chen, Bing-Tsung Wu, Ching-Lung Su, Jinn-Shyan Wang, and Jiun-In Guo, 2009, A dynamic quality-adjustable H.264 video encoder for power-aware video applications, IEEE Trans. Circuits & Systems for Video Technology, EEE Trans. Circuits & Systems for Video Technology, Vol.19, No.2, pp.1739-1754. (SCI, EI)
2. Yu-Lin Wang, Ming-Ju Wu, Shih-Chieh Chen, Ching-Lung Su, 2009, Android multimedia framework, STC Technical Journal, Vol.11, pp.34-46. (其他)
3. 瞿萬邦, 蘇文建, 陳仕杰, 蘇慶龍, 2009, 高畫質多媒體PAC Duo SoC-台灣首顆Android多核心晶片解決方案現身, 零組件雜誌, No.209, pp.33-37.
4. 劉建宏, 林國弘, 陳澤民, 江宜霖, 王正雄, 王俊又, 瞿萬邦, 林浤, 蘇慶龍, 2008, Android於PAC Duo SoC之移植, Journal of Institute of Information & Computing Machinery, Vol.11, No.3, pp.15-26.
5. Ching-Lung Su, 2007, The bottleneck and performance analysis for the MPEG embedded system SoC hardware and software design, Journal of Institute of Information & Computing Machinery.
6. Chih-Da Chien, Keng-Po Lu, Yu-Min Chen, Jiun-In Guo, Yuan-Sun Chu, and Ching-Lung Su, 2006, An Efficient Variable Length Decoder IP Core Design for MPEG-1/2/4 Video Coding Applications, IEEE Trans. Circuits & Systems for Video Technology, Vol.6, No.9, pp.1172-1178. (SCI, EI)
7. Ching-Long Su and Chein-Wei Jen, 2003, MSD-first On-line Arithmetic Progressive Processing Implementation for Motion Estimation, IEICE Trans. on Information& Systems, Vol. E86-D, No. 11, pp. 2433-2442. (SCI, EI)
8. Ching-Long Su and Chein-Wei Jen, 2003, Motion estimation using MSD-First processing, IEE Proceedings G-Circuits,Devices and Systems, Vol. 150, No. 2, pp. 124-133. (SCI, EI)

1. Ching-Lung Su, Jin-Yu zeng, Kun-xiu cai, Ming-Wei Iv, Kang-Ning Pang, and Tse-Min Chen, 2009, Processing of Subtitle Effects and its Implementation on a Heterogeneous Dual Core Embedded System, The 3rd. Asia-Pacific Embedded Systems Education and Research Conference (APESER 2009), 2009/12/14-15, IET,南洋理工學院, 新加坡, pp.S203.
2. Ching-Lung Su, Jin-Yu zeng, Kun-xiu cai, Ming-Wei Iv, Kang-Ning Pang, and Tse-Min Chen, 2009, Design & Implementation of Caption Correction on Dual Core System Platform for Portable Device, 2009 Conference on Innovative Applications of System Prototyping and Circuits Design, 2009/10/16, 教育部PAL聯盟, 桃園, pp.239-244.
3. Wen-Kai Tsai, Ming-Hwa Sheu, Ching-Lung Su, Jun-Jie Lin and Shau-Yin Tseng, 2009, Image Object Detection and Tracking Implementation for Outdoor Scenes on an Embedded SoC Platform, 2009 Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing, 2009/09/20-21, 大陸大學, 浙江, pp.386-389.
4. Ching-Lung Su, Tse-Min Chen, Chih-Yang Huang, Shau-Yin Tseng, and Jiun-In Guo, 2009, A motion estimation algorithm with low memory and bandwidth requirements for H.264/AVC scalable extension, The 20th VLSI Design / CAD Symposium, 2009/08/20-23, IC設計學會, 花蓮, pp.187-190.
5. Ching-Lung Su, Tse-Min Chen, Kang-Ning Pang, and Shau-Yin Tseng, 2009, Low complexity and high quality frame error concealment algorithm for H.264/AVC scalable extension, The 22th IPPR Conference on Computer Vision, Graphics, and Image processing (CVGIP), 2009/08/15-17, 影像學會, 南投, pp.1328-1331.
6. Wen-Kai Tsai, Jian-Guo Chen, Ming-Hwa Sheu, Ching-Lung Su, 2009, Image Object Detection and Tracking Implementation on An Embedded SoC Platform, The 22th IPPR Conference on CVGIP, 2009/08/15-17, 影像學會, 南投, pp.873-878.
7. Ming-Wei Chang, Shau-Yin Tseng, Homn Lin1, and Ching-Lung Su, 2009, Implementation and Optimization of DSP Suspend Resume on Dual-Core SoC, 2009 IEEE International Conference on Embedded Software and Systems, 2009/05/25-27, Zhejiang University (P.R.China) and IEEE Computer Society Technical Committee, Hang Zhou.
8. Hsiu-Cheng Chang, Yao-Chang Yang, Jia-Wei Cheng, Ching-Lung Su, 2009, A Dynamic Quality-Scalable H.264 Video Encoder Chip, The 14th Asia and South Pacific Design Automation Conference (ASP-DAC 2009), 2009/01/19-22, ACM/IEEE/IEICE/IPSJ, Yokohama.
9. Homn Lin, Wan-Bang Chu, Ming-Wei Chang, Jian-Hong Liu, Cheng-Hsiung Wang, Shau-Yin Tseng, and Ching-Lung Su, 2008, PAC Duo Power Management on Android, International Workshop on Video Coding and Video Processing, 2008/11/27-28, Hisilicon Co., Shenzhen, S5-3.
10. Ching-Lung Su, and Jiun-In Guo, 2008, A Multi-mode Entropy Decoder with a Generic Table Partition Strategy, 2008 International SoC Design Conference (ISOCC), 2008/11/24-25, IEEK/IDEC, Busan.
11. Feng-Lin Lee, Ching-Lung Su, 2008, The Design and Implementation of a Cyber Shopping Embedded System in Real Malls, 2008 Conference on Innovative Applications of System Prototyping and Circuits Design, 2008/10/17, MOE, PAL, Taichung, pp.241-246.
12. Yuan-Hua Chu, Jui-Hung Chien , Tai-Ji Lin , Ching-Lung Su, and Shau-Yin Tseng, 2008, Development of Fluorescence Computational Algorithm for DNA Amplification, WSEAS International Conference on Circuits, 2008/07/22-24, WSEAS, Heraklion, Crete Island, pp.65-69.
13. ing-Yu Huang, Guo-An Jian, Jui-Chin Chu, Ching-Lung Su, and Jiun-In Guo, 2008, Joint Algorithm/Code-Level Optimization of H.264 Video Decoder for Mobile Multimedia Applications, 2008 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2008/03/30-2008/04/04, IEEE, Las Vegas, pp.2189-2192.
14. Ping-Tsung Wu, Tzu-Chun Chang, Ching-Lung Su, and Jiun-In Guo, 2008, A H.264 Basic-Unit Level Rate Control Algorithm Facilitating Hardware Realization, 2008 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2008/03/30-2008/04/04, IEEE, Las Vegas, pp.2185-2188.
15. 蘇慶龍, 2007, 系統單晶片雛型發展系統架構與設計方法, 2007 Conference on Innovative Applications of System Prototyping and Circuits, 2007/09/28, PAL, MOE, Tainan, pp.78-82.
16. Hsiu-Cheng Chang, Jia-Wei Chen, Ching-Lung Su, Yao-Chang Yang, Yao Li1, Chun-Hao Chang, Ze-Min Chen, Wei-Sen Yang, Chien-Chang Lin, Ching-Wen Chen, Jinn-Shan Wang, and Jiun-In Guo, 2007, A 7-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip, IEEE International Solid-State Circuits Conference (ISSCC), 2007/02/11-15, IEEE, 舊金山, pp.280-281.
17. Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao-Chang Yang, Ching-Wen Chen, and Jiun-In Guo, 2006, A Low Complexity High Quality Integer Motion Estimation Architecture Design for H.264/AVC, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2006/12/04-07, 新加坡. (95年度國科會專題研究計畫 計畫名稱:「H.264 Inter Prediction矽智產設計」, NSC95-2221-E-224-110)
18. Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Ching-Wen Chen, Yao Li, Ching-Wen Chen and Jiun-In Guo, 2006, Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2006/12/04-07, 新加坡. (95年度工業技術研究院系統晶片科技中心研究計畫案計劃名稱:"快速但低耗電之Motion Estimation加速器研究, 95-211)
19. Yi-Ting Hong, Ze-Ming Chen, Wei-Sen Yang, Guo-Zhen Wu, Jun-Yu Yang, Guan-Wei Fan and Ching-Lung Su, 2005, A Linux Embedded System Implementation to an ARM-based SoC Prototype and Its HW/SW Performance Optimization for the MPEG-4 Simple Profile Level 2 Decoder, 2005 Workshop on Consumer Electronics and Signal Processing, Yinlin.
20. Chung-Lin Wu, Zhen-Yong Gao, and Ching-Lung Su, 2004, A high-speed 2-D DCT/IDCT architecture with low transpose memory requirements, preceedings of 2004,the 14th VLSI design/CAD Symposium, Kenting.
21. Ching-Long Su and Chein-Wei Jen, 2001, Motion Estimation with MSD-First Processing.
22. Ching-Long Su and Chein-Wei Jen, 2000, Motion Estimation Using On-line arithmetic.
23. Ching-Long Su, Yin-Tsung Hwang and Chein-Wei Jen, 1997, A novel recursive digital filter based on signed digit distributed arithmetic.
24. Yin-Tsung Hwang and Ching-Long Su, 1996, Parallel and Pipelined Architecture Designs for Distributed Arithmetic-Based Recursiv Digital Filters.
25. Yin-Tsung Hwang and Ching-Long Su, 1996, A New Design Appraoch and VLSI Implementations of Recursive Digital Filters.
26. Ching-Long Su and Yin-Tsung Hwang, 1996, The Design & VLSI Implementation of A DA Look-Ahead Structure ARMA Filter.
27. Ching-Long Su and Yin-Tsung Hwang, 1996, Distributed Arithmetic-Based Architectures for High Speed IIR Filter Design.
28. Ching-Long Su and Yin-Tsung Hwang, 1996, Distribued Arithmetic Based Recursive Digital Filter Design for High Throughput Applications.
29. Ching-Long Su, Yin-Tsung Hwang, Ming-Kuen Chen and Chien-Ming Sun, 1995, he Design & VLSI Implementation of A High Speed Low Chip Area ARMA Filter.

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